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U2352B
PWM Power Control for DC Loads
Description
The U2352B bipolar circuit is a PWM device for controlling logic level Power MOSFETs and IGBTs. It allows simple power control for DC loads. Integrated load current monitoring with adjustable switch-off threshold also gives the option of measuring the load current via the MOS transistor's on-state resistance, RDS(on), or via a shunt resistor.
Special Features
D Pulse width control up to 50 kHz clock frequency D Load current monitoring via the on-state resistance,
RDS(on), of the FET or via shunt resistor (optional)
Applications
D Battery-operated screwdrivers D Battery-operated machine tools D Halogen lamp controllers D Dimmers D Electronic fuses D High-performance clock generators
D D D D
100 mA push-pull output stage Voltage monitoring Temperature-compensated supply voltage limitation Chip temperature monitoring
Block Diagram
VS 2xI Reference voltage 8 VS
S1 1
Oscillator
Chip temperature monitoring 140C
Voltage limitation 6.8 V
I
- 2 K1 +
Output stage logic Push-pull output stage
7
Time window current measurement 3 - + K 2 Load current monitoring
Q S
Q R
6 GN D
PO R
4 S2
5
Figure 1. Block diagram
Ordering Information
Extended Type Number U2352B-x U2352B-xFP U2352B-xFPG3 Package DIP8 SO8 SO8 Remarks Tube Tube Taped and reeled
Rev. A2, 09-Nov-99
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U2352B
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VB R1 VS R2 R5 2xI Reference voltage D1 M Load S1 C Osc 1 Oscillator Chip temperature monitoring 140 C Voltage limitation 6.8 V 8 VS D2 D3 R6 R7 C1 R3 I Set C2 3 - K2 + Load current monitoring POR 5 *) R D V Control R8 Time window current measurement Q S Q R Push-pull output stage 6 GND 2 - K1 + Output stage logic 7 RG T1
Figure 2. Block diagram with typical circuit
I
4
S2 R4 R9 C3
Rev. A2, 09-Nov-99
* Load current can also optionally be measured via shunt resistor
U2352B
Pin Description
Osc VContr ISet S2OUT 1 8 VS Output Pin 1 2 3 4 5 6 7 8 Symbol Osc VContr ISet S2OUT S2IN GND Output VS Function Oscillator Control voltage input Setpoint value current monitoring Output, current switch S2 Input, current switch S2 Ground Output Supply voltage
2
7
U2352B
3 6 GND S2IN
4
Figure 3. Pinning
5
Supply, Pin 8
Internal voltage limitation in the U2352B allows a simple supply via a series resistor R1. This enables operation of the circuit under different operating voltages. Supply voltage between Pin 8 (VS) and Pin 6 (GND) builds up via R1 and is smoothed by C1. The series resistor R1 is calculated as follows: R 1max
Pulse Width Control, Pins 1 and 2
At the frequency-determining capacitor, Cosc, at Pin 1, switching over of two internal current sources gives rise to a triangular voltage which comparator, K1, compares with the control voltage at Pin 2. If the voltage, V1, is more negative than the control voltage V2, the output stage is switched on via the output stage logic. When Cosc is charged, the whole process then runs in reverse order (see figure 3).
+V *V I
Bmin tot
Smax
Load Current Monitoring, Pins 3, 4, 5
Load current can be measured with the aid of an external shunt resistor, but this is only appropriate for decreased loads due to additional power loss and component size and costs. This involves the shunt voltage being fed directly to Pin 4 via a protective resistor (see figure 5). In order to save component costs and additional power loss, the integrated load current monitoring allows the load current to be directly measured via the voltage drop at the on-state resistance, RDS(on), of the FET, without an additional shunt resistor. The drain voltage of the FET is supplied via an external protective resistor to Pin 5. During the off-state of the FET, a diode clamp circuit protects the detection input, Pin 5. In the on state, the load current flowing through the FET generates a corresponding voltage drop at its RDS(on), which is in turn converted into a current at Pin 5 by the protective resistor. This current reaches the integration element at Pin 4 via the switch S2, which is only closed in the on-state of the FET. If the voltage at Pin 4 exceeds the setpoint value set at Pin 3, as a result of a high load current, the shutdown latch is set and the output stage is blocked. To enable the circuit again, it is necessary to switch the operating voltage off and then back on again. Switch-off behavior is adjusted with the resistors at Pin 4 and Pin 5 and also with the capacitor at Pin 4.
where VBmin = Minimum operating voltage VSmax = Maximum supply voltage Itot = ISmax + IX ISmax = Maximum current consumption of the IS IX = Current consumption of the external elements Various thresholds are derived from an internal reference voltage source.
Voltage Monitoring
During build-up and reduction of the operating voltage, uncontrolled output pulses with excessively low amplitude are suppressed by the internal monitoring circuit. All latches are reset and the output of the load current detection Pin 4 is switched to ground.
Chip Temperature Monitoring
U2352B has integrated chip temperature monitoring which switches off the output stage when a temperature of approximately 140C is reached. The device is not enabled again until cooling has taken place and the supply voltage has been switched off and then back on again.
Rev. A2, 09-Nov-99
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U2352B
A time space, Dt, must be observed between switching the output stage off and on and switching S2 (current measurement enable switch) in order to avoid incorrect measurement and incorrect switching-off. To create this time window, the control voltage V2 is reduced internally about DV2 = approximately 300 mV and the resulting voltage, V2*, is compared with the triangular voltage, V1 (see figure 3).
V 0.6 VS V2 V2 * 0.3 VS V1
DV2
V7
S2 closed open
Dt
Dt
t
Figure 4. Signal characteristics of pulse width control with time window generation
Absolute Maximum Ratings
Reference point Pin 6, unless otherwise specified Parameters Power supply current t < 10 ms Push-pull output stage Output current t < 2 ms Input currents Input voltages Storage temperature range Junction temperature Ambient temperature Pin 8 Pin 8 Pin 7 Pin 7 Pins 4 and 5 Pins 1 and 3 Pins 1, 2 and 3 Symbol IS iS IO iO II II VI Tstg Tj Tamb Value 40 400 20 100 10 2 0 to V8 -40 to +125 +125 -10 to +100 Unit mA mA mA mA mA mA V C C C
Thermal Resistance
Junction ambient Parameters DIP8 SO8 on PC board SO8 on ceramic Symbol RthJA RthJA RthJA Maximum 110 220 140 Unit K/W K/W K/W
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Rev. A2, 09-Nov-99
U2352B
Electrical Characteristics
VS = 6 V, Tamb = 25_C, reference point Pin 6, unless otherwise specified Parameters Supply voltage limitation Current consumption Voltage monitoring Switch-on threshold Switch-off threshold Oscillator f OSC [kHz] Test Conditions / Pins IS = 5 mA Pin 8 IS = 20 mA VS = 6 V Pin 8 Pin 8 Pin 8 Symbol VS VS IS VSON VSOFF Pin 1 VTu VTl -Ich Idis Pin 2 Pin 2 Pin 2-1 Pin 2-1 VI Ii VOffs -DV2 3.4 1.7 26 26 0 260 300 3.6 1.8 33 33 3.8 1.9 40 40 V8 500 15 340 V V Min. 6.4 6.5 Typ. 6.8 6.9 2.7 5.6 5.1 Max. 7.2 7.3 3.5 6.0 5.5 Unit V V mA V V
5.2 4.7
[C
OSC
55 [nF] V S [V]
Upper threshold (0.6 VS) Lower threshold (0.3 VS) Charge current Discharge current Control voltage input Input voltage range Input current, Offset voltage K1 Window, current measurement Load current monitoring Setpoint value input: Input voltage range Input current Offset voltage K2 Load current detection: Voltage limitation Voltage limitation Discharge current at POR Switch S2 Residual voltage at closed switch
mA mA
V nA mV mV
0 V V2 V8
0 V V3 6 V
Pin 3 Pin 3 Pin 4-3 Pin 5 Pin 5 Pin 4 Pin 5-4
VI Ii VOffs VL -VL Idis
0
6 500 15 2.3 0.7
V nA mV V V mA
I5 = 1 mA I5 = -1 mA
1
Push-pull output stage Upper saturation voltage Lower saturation voltage Output current ON state OFF state
V4 = 0 V, I5 = 50 mA V4 = 0.1 V, I5 = 50 mA V4 = 0.3 V, I5 = 50 mA V4 = 0.3 V, I5 = 100 mA Pin 7 I7 = -2 mA Pin 7-8 I7 = 10 mA Pin 7 t 2 ms t 2 ms
VSat VSat VSat VSat -VSatu VSatl -io io 100 100
175 150 125 200 1 0.3
mV mV mV mV V V mA mA
Rev. A2, 09-Nov-99
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U2352B
1000
VIN
RD = 20 kW VOUT ( mV ) 800
R9=1MW 500KW 100KW
5
600
50KW
400 200
20KW 10KW
S2 4
5KW
0
R9
VOUT
0
200
400
600 VIN ( mV )
800
1000
Figure 5. Typical circuitry of the current switch S2 with associated transfer characteristics (S2 closed)
R1 R2 82 kW R5 33 kW D1 D1, T1 and Rsh are load dependent Cosc 1 680 pF C1 4.7 Speed 68 kW 2 R7 27 kW R8 C2 470 nF 3 C4 4 R4 1kW R9 C3 10 nF 1.5 kW Rsh 5 7 RG 8 D3 T1 D2 M Load
VB
mF
R6 47 kW R3
U2352B
6
10 kW Torque
GND
Figure 6. Speed control with load current monitoring (load current detection via shunt resistor)
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Rev. A2, 09-Nov-99
U2352B
Package Information
Package DIP8
Dimensions in mm
9.8 9.5 1.64 1.44 7.77 7.47
4.8 max 6.4 max 0.5 min 0.58 0.48 7.62 8 5 2.54 3.3 0.36 max 9.8 8.2
technical drawings according to DIN specifications
1
4
Package SO8
Dimensions in mm
5.00 4.85 1.4 0.4 1.27 3.81 8 5 0.25 0.10 0.2 3.8 6.15 5.85 5.2 4.8 3.7
technical drawings according to DIN specifications
1
4
Rev. A2, 09-Nov-99
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U2352B
Ozone Depleting Substances Policy Statement
It is the policy of TEMIC Semiconductor GmbH to 1. Meet all present and future national and international statutory requirements. 2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems with respect to their impact on the health and safety of our employees and the public, as well as their impact on the environment. It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as ozone depleting substances ( ODSs). The Montreal Protocol ( 1987) and its London Amendments ( 1990) intend to severely restrict the use of ODSs and forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban on these substances. TEMIC Semiconductor GmbH has been able to use its policy of continuous improvements to eliminate the use of ODSs listed in the following documents. 1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively 2 . Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental Protection Agency ( EPA) in the USA 3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C ( transitional substances ) respectively. TEMIC Semiconductor GmbH can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain such substances.
We reserve the right to make changes to improve technical design and may do so without further notice. Parameters can vary in different applications. All operating parameters must be validated for each customer application by the customer. Should the buyer use TEMIC Semiconductors products for any unintended or unauthorized application, the buyer shall indemnify TEMIC Semiconductors against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. TEMIC Semiconductor GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany Telephone: 49 ( 0 ) 7131 67 2594, Fax number: 49 ( 0 ) 7131 67 2423
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Rev. A2, 09-Nov-99

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